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LT3512 Monolithic High Voltage Isolated Flyback Converter FEATURES
n n n n n n n n n
DESCRIPTION
The LT3512 is a high voltage monolithic switching regulator specifically designed for the isolated flyback topology. No third winding or opto-isolator is required for regulation as the part senses output voltage directly from the primary-side flyback waveform. The device integrates a 420mA, 150V power switch, high voltage circuitry, and control into a high voltage 16-lead MSOP package with four leads removed. The LT3512 operates from an input voltage range of 4.5V to 100V and delivers up to 4.5W of isolated output power. Two external resistors and the transformer turns ratio easily set the output voltage. Off-the-shelf transformers are available for several applications. The high level of integration and the use of boundary mode operation results in a simple, clean, tightly regulated application solution to the traditionally tough problem of isolated power delivery.
L, LT, LTC, LTM, Burst Mode, Linear Technology and the Linear logo are registered trademarks and No RSENSE is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents, including 5438499, 7471522.
4.5V to 100V Input Voltage Range Internal 420mA, 150V Power Switch Boundary Mode Operation No Transformer Third Winding or Opto-Isolator Required for Regulation Improved Primary-Side Winding Feedback Load Regulation VOUT Set with Two External Resistors BIAS Pin for Internal Bias Supply and Power Switch Driver No External Start-Up Resistor 16-Lead MSOP Package
APPLICATIONS
n n n
Isolated Telecom Power Supplies Isolated Auxiliary/Housekeeping Power Supplies Isolated Industrial, Automotive and Medical Power Supplies
TYPICAL APPLICATION
48V to 5V Isolated Flyback Converter
VIN 36V TO 72V 4:1 1F 1M EN/UVLO 43.2k LT3512 RFB RREF 10k TC VC 57.6k SW GND BIAS 12.7k 4.7nF
3512 TA01a
Output Load and Line Regulation
VOUT+ 5V 0.5A 11H 47F
VOUT (V) 5.25 5.20 5.15 5.10 5.05 5.00 4.95 4.90 4.85 4.80 4.75 0 100 200 300 400 LOAD CURRENT (mA) 500
3512 TA01b
VIN 175H 169k
VOUT-
VIN = 48V
VIN = 36V
VIN = 72V
4.7F
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LT3512 ABSOLUTE MAXIMUM RATINGS
(Note 1)
PIN CONFIGURATION
TOP VIEW EN/UVLO 1 VIN 3 GND BIAS NC GND 5 6 7 8 16 SW 14 RFB 12 11 10 9 RREF TC VC GND
SW (Note 4) ............................................................150V VIN, EN/UVLO..........................................................100V RFB ............................................................100V, VIN 6V BIAS ...................................................................VIN, 20V RREF,TC, VC .................................................................6V Operating Junction Temperature Range (Note 2) LT3512E, LT3512I .............................. -40C to 125C LT3512H ............................................ -40C to 150C Storage Temperature Range .................. -65C to 150C
MS PACKAGE 16(12)-LEAD PLASTIC MSOP JA = 90C/W
ORDER INFORMATION
LEAD FREE FINISH LT3512EMS#PBF LT3512IMS#PBF LT3512HMS#PBF TAPE AND REEL LT3512EMS#TRPBF LT3512IMS#TRPBF LT3512HMS#TRPBF PART MARKING* 3512 3512 3512 PACKAGE DESCRIPTION 16-Lead Plastic MSOP 16-Lead Plastic MSOP 16-Lead Plastic MSOP TEMPERATURE RANGE -40C to 125C -40C to 125C -40C to 150C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS
PARAMETER Input Voltage Range
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VIN = 24V unless otherwise noted.
CONDITIONS
l
MIN 6 4.5
TYP
MAX 100 15
UNITS V V mA A V A A kHz kHz
VIN = BIAS Quiescent Current EN/UVLO Pin Threshold EN/UVLO Pin Current Maximum Switching Frequency Minimum Switching Frequency Maximum Current Limit Minimum Current Limit Switch VCESAT RREF Voltage RREF Voltage Line Regulation RREF Pin Bias Current Error Amplifier Voltage Gain Error Amplifier Transconductance I = 2A 6V < VIN < 100V (Note 3)
l
Not Switching VEN/UVLO = 0.2V EN/UVLO Pin Voltage Rising VEN/UVLO =1.1V VEN/UVLO =1.4V
l
3.5 0 1.15 2.0 1.21 2.6 0 650 40 420 80 600 120 0.5
l
4.5 1.27 3.3
800 150 1.215 1.23 0.03 400
mA mA V V V %/V nA V/V mhos
ISW = 200mA 1.18 1.17
1.20 0.01 80 150 140
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LT3512 ELECTRICAL CHARACTERISTICS
PARAMETER TC Current into RREF BIAS Pin Voltage
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VIN = 24V unless otherwise noted.
CONDITIONS RTC = 53.6k Internally Regulated 3 MIN TYP 9.5 3.1 3.2 MAX UNITS A V
Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LT3512E is guaranteed to meet performance specifications from 0C to 125C junction temperature. Specifications over the -40C to 125C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. The LT3512I is guaranteed to meet performance specifications from -40C to
125C operating junction temperature range. The LT3512H is guaranteed over the full -40C to 150C operating junction temperature range. High junction temperatures degrade operating lifetimes. Operating lifetime is derated at junction temperatures greater than 125C. Note 3: Current flows out of the RREF pin. Note 4: The SW pin is rated to 150V for transients. Operating waveforms of the SW pin should keep the pedestal of the flyback waveform below 100V as shown in Figure 5.
TYPICAL PERFORMANCE CHARACTERISTICS
Output Voltage
5.25 5.20 5.15 5.10 VOUT (V) IQ (mA) 5.05 5.00 4.95 4.90 4.85 4.80 4.75 -50 -25 0 25 50 75 100 125 150 TEMPERATURE (C)
3512 G01
TA = 25C, unless otherwise noted. BIAS Pin Voltage
4.0
Quiescent Current
8
VIN = 48V
6 BIAS VOLTAGE (V) VIN = 24V VIN = 48V VIN = 100V 0 -50 -25 0 25 50 75 100 125 150 TEMPERATURE (C)
3512 G02
3.5
4
3.0
2
2.5 VIN = 24V, 10mA VIN = 24V, NO LOAD 2.0 -50 -25 0 25 50 75 100 125 150 TEMPERATURE (C)
3512 G03
Switch VCESAT
2000 SWITCH VCESAT VOLTAGE (mV) 800 700 1600 CURRENT LIMIT (mA) 600 500 400 300 200 100 0 0
Switch Current Limit
5 MAXIMUM CURRENT LIMIT 4
Quiescent Current vs VIN
800
IQ (mA) MINIMUM CURRENT LIMIT 0 25 50 75 100 125 150 TEMPERATURE (C)
3512 G05
1200
3
2
400
1
300 100 200 400 SWITCH CURRENT (mA)
500
3512 G04
0 -50 -25
0
0
20
60 40 VOLTAGE (V)
80
100
3512 G06
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LT3512 TYPICAL PERFORMANCE CHARACTERISTICS
EN/UVLO Pin (Hysteresis) Current vs Temperature
5 EN/UVLO = 1.2V EN/UVLO PIN CURRENT (A) EN/UVLO PIN CURRENT (A) 4 25 EN/UVLO THRESHOLD (V) 20 15 10 5 0 0 25 50 75 100 125 150 TEMPERATURE (C)
3512 G07
TA = 25C, unless otherwise noted. EN/UVLO Threshold vs Temperature
3.0 2.5 2.0 1.5 1.0 0.5 0 -50 -25
EN/UVLO Pin Current vs VEN/UVLO
30
3
2
1
0 -50 -25
1
20
60 80 VEN/UVLO VOLTAGE (V)
40
100
3512 G08
0
25 50 75 100 125 150 TEMPERATURE (C)
3512 G09
Maximum Frequency vs Temperature
1000 900 MAXIMUM FREQUENCY (kHz) MINIMUM FREQUENCY (kHz) 800 700 600 500 400 300 200 100 0 -50 -25 0 25 50 75 100 125 150 TEMPERATURE (C)
3512 G10
Minimum Frequency vs Temperature
100 90 EN/UVLO THRESHOLD (V) 80 70 60 40 40 30 20 10 0 -50 -25 0 25 50 75 100 125 150 TEMPERATURE (C)
3512 G11
EN/UVLO Shutdown Threshold vs Temperature
0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 -50 -25 0 25 50 75 100 125 150 TEMPERATURE (C)
3512 G14
Boundary Mode Waveform
Light Load Discontinuous Mode Waveform
20V/DIV
20V/DIV
2s/DIV
3512 G12
2s/DIV
3512 G13
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LT3512 PIN FUNCTIONS
EN/UVLO (Pin 1): Enable/Undervoltage Lockout. The EN/ UVLO pin is used to start up the LT3512. Pull the pin to 0V to shut down the LT3512. This pin has an accurate 1.21V threshold and can be used to program an undervoltage lockout (UVLO) threshold using a resistor divider from supply to ground. A 2.6A pin current hysteresis allows the programming of undervoltage lockout (UVLO) hysteresis. EN/UVLO can be directly connected to VIN. If left open circuit the part will not power up. VIN (Pin 3): Input Supply Pin. This pin supplies current to the internal start-up circuitry, and serves as a reference voltage for the DCM comparator and feedback circuitry. Must be locally bypassed with a capacitor. GND (Pin 5, 8, 9): Ground Pins. All three pins should be tied directly to the local ground plane. BIAS (Pin 6): Bias Voltage. This pin supplies current to the switch driver and internal circuitry of the LT3512. This pin may also be connected to VIN if a third winding is not used and if VIN < 20V. The part can operate down to 4.5V when BIAS and VIN are connected together. If a third winding is used, the BIAS voltage should be lower than the input voltage and greater than 3.3V for proper operation. BIAS must be bypassed with a 4.7F capacitor placed close to the pin. VC (Pin 10): Compensation Pin for Internal Error Amplifier. Connect a series RC from this pin to ground to compensate the switching regulator. An additional 100pF capacitor from this pin to ground helps eliminate noise. TC (Pin 11): Output Voltage Temperature Compensation. Connect a resistor to ground to produce a current proportional to absolute temperature to be sourced into the RREF node. ITC = 0.55V/RTC. RREF (Pin 12): Input Pin for External Ground-Referred Reference Resistor. The resistor at this pin should be 10k. For nonisolated applications, a traditional resistor voltage divider from VOUT may be connected to this pin. RFB (Pin 14): Input Pin for External Feedback Resistor. This pin is connected to the transformer primary (VSW). The ratio of this resistor to the RREF resistor, times the internal bandgap reference, determines the output voltage (plus the effect of any non-unity transformer turns ratio). For nonisolated applications, this pin should be connected to VIN. SW (Pin 16): Switch Pin. Collector of the internal power switch. Minimize trace area at this pin to minimize EMI and voltage spikes.
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LT3512 BLOCK DIAGRAM
D1 VIN C1 L1A R3 N:1 VIN Q3 TC R5 I2 RREF R4 BIAS C4 R1 EN/UVLO R2 3A Q4 R6 C3
3512 BD
T1 L1B C2
VOUT +
VOUT -
TC CURRENT
RFB Q2 FLYBACK ERROR AMP CURRENT COMPARATOR ONE SHOT A2
SW
- +
1.2V
- gm +
+
VIN
- A1 +
S S MASTER LATCH R Q
V1 120mV DRIVER BIAS
-
Q1
A4
+ -
1.21V
+ A5 -
RSENSE 0.01 GND
INTERNAL REFERENCE AND REGULATORS
OSCILLATOR
VC
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LT3512 OPERATION
The LT3512 is a current mode switching regulator IC designed specifically for the isolated flyback topology. The key problem in isolated topologies is how to communicate information regarding the output voltage from the isolated secondary side of the transformer to the primary side. Historically, optoisolators or extra transformer windings communicate this information across the transformer. Optoisolator circuits waste output power, and the extra components increase the cost and physical size of the power supply. Optoisolators can also exhibit trouble due to limited dynamic response, nonlinearity, unit-to-unit variation and aging over life. Circuits employing an extra transformer winding also exhibit deficiencies. Using an extra winding adds to the transformer's physical size and cost, and dynamic response is often mediocre. In the LT3512, the primary-side flyback pulse provides information about the isolated output voltage. In this manner, neither optoisolator nor extra transformer winding is required for regulation. Two resistors program the output voltage. Since this IC operates in boundary mode, the part calculates output voltage from the switch pin when the secondary current is almost zero. The Block Diagram shows an overall view of the system. Many of the blocks are similar to those found in traditional switching regulators including internal bias regulator, oscillator, logic, current amplifier, current comparator, driver, and output switch. The novel sections include a special flyback error amplifier and a temperature compensation circuit. In addition, the logic system contains additional logic for boundary mode operation. The LT3512 features boundary mode control, where the part operates at the boundary between continuous conduction mode and discontinuous conduction mode. The VC pin controls the current level just as it does in normal current mode operation, but instead of turning the switch on at the start of the oscillator period, the part turns on the switch when the secondary-side winding current is zero. Boundary Mode Operation Boundary mode is a variable frequency, current mode switching scheme. The switch turns on and the inductor current increases until a VC pin controlled current limit. After the switch turns off, the voltage on the SW pin rises to the output voltage divided by the secondary-to-primary transformer turns ratio plus the input voltage. When the secondary current through the diode falls to zero, the SW pin voltage falls below VIN. A discontinuous conduction mode (DCM) comparator detects this event and turns the switch back on. Boundary mode returns the secondary current to zero every cycle, so parasitic resistive voltage drops do not cause load regulation errors. Boundary mode also allows the use of a smaller transformer compared to continuous conduction mode and does not exhibit subharmonic oscillation. At low output currents, the LT3512 delays turning on the switch, and thus operates in discontinuous mode. Unlike traditional flyback converters, the switch has to turn on to update the output voltage information. Below 0.6V on the VC pin, the current comparator level decreases to its minimum value, and the internal oscillator frequency decreases. With the decrease of the internal oscillator, the part starts to operate in DCM. The output current is able to decrease while still allowing a minimum switch off time for the flyback error amplifier. The typical minimum internal oscillator frequency with VC equal to 0V is 40kHz.
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LT3512 APPLICATIONS INFORMATION
PSUEDO DC THEORY In the Block Diagram, RREF (R4) and RFB (R3) are external resistors used to program the output voltage. The LT3512 operates similar to traditional current mode switchers, except in the use of a unique error amplifier, which derives its feedback information from the flyback pulse. Operation is as follows: when the output switch, Q1, turns off, its collector voltage rises above the VIN rail. The amplitude of this flyback pulse, i.e., the difference between it and VIN, is given as: VFLBK = (VOUT + VF + ISEC * ESR) * NPS VF = D1 forward voltage ISEC = Transformer secondary current ESR = Total impedance of secondary circuit NPS = Transformer effective primary-to-secondary turns ratio RFB and Q2 convert the flyback voltage into a current. Nearly all of this current flows through RREF to form a groundreferred voltage. The resulting voltage forms the input to the flyback error amplifier. The flyback error amplifier samples the voltage information when the secondary side winding current is zero. The bandgap voltage, 1.20V, acts as the reference for the flyback error amplifier. The relatively high gain in the overall loop will then cause the voltage at RREF to be nearly equal to the bandgap reference voltage VBG. The resulting relationship between VFLBK and VBG approximately equals: VFLBK VBG R or VFLBK = VBG FB R =R FB RREF REF VBG = Internal bandgap reference Combination of the preceding expression with earlier derivation of VFLBK results in the following equation: R 1 VOUT = VBG FB - VF - ISEC (ESR) RREF NPS The expression defines VOUT in terms of the internal reference, programming resistors, transformer turns ratio and diode forward voltage drop. Additionally, it includes the effect of nonzero secondary output impedance (ESR). Boundary control mode minimizes the effect of this impedance term. Temperature Compensation The first term in the VOUT equation does not have temperature dependence, but the diode forward drop has a significant negative temperature coefficient. A positive temperature coefficient current source connects to the RREF pin to compensate. A resistor to ground from the TC pin sets the compensation current. The following equation explains the cancellation of the temperature coefficient: R 1 VF = - FB * * NPS T R TC -R 1 R TC = FB * NPS VF / T VTC or, T V R * TC FB T NPS
(VF /T) = Diode's forward voltage temperature coefficient (VTC /T) = 2mV VTC = 0.55V Experimentally verify the resulting value of RTC and adjust as necessary to achieve optimal regulation over temperature. The addition of a temperature coefficient current modifies the expression of output voltage as follows: R 1 VOUT = VBG FB - VF RREF NPS V R - TC * FB - ISEC (ESR) R TC NPS Output Power A flyback converter has a complicated relationship between the input and output current compared to a buck or a boost. A boost has a relatively constant maximum input current regardless of input voltage and a buck has a relatively constant maximum output current regardless of input voltage. This is due to the continuous nonswitching behavior of the two currents. A flyback converter has both discontinuous input and output currents which makes it
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LT3512 APPLICATIONS INFORMATION
similar to a nonisolated buck-boost. The duty cycle will affect the input and output currents, making it hard to predict output power. In addition, the winding ratio can be changed to multiply the output current at the expense of a higher switch voltage. The graphs in Figures 1-4 show the typical maximum output power possible for the output voltages 3.3V, 5V, 12V and 24V. The maximum power output curve is the calculated output power if the switch voltage is 100V during the off-time. 50V of margin is left for leakage voltage spike. To achieve this power level at a given input, a winding ratio value must be calculated to stress the switch to 100V, resulting in some odd ratio values. The following curves are examples of common winding ratio values and the amount of output power at given input voltages.
5.0 N = 15 4.0 OUTPUT POWER (W) N = NPS(MAX) N = 12 N = 10 N=8 N=6 2.0 N=4 OUTPUT POWER (W)
One design example would be a 5V output converter with a minimum input voltage of 36V and a maximum input voltage of 72V. A four-to-one winding ratio fits this design example perfectly and outputs close to 3.0W at 72V but lowers to 2.5W at 36V. The equations below calculate output power: Power = * VIN * D * IPEAK * 0.5 Efficiency = = ~83% Duty cycle = D =
( VOUT + VF ) *NPS ( VOUT + VF ) *NPS + VIN
Peak switch current = IPEAK = 0.44A
5.0 N=5 N = NPS(MAX) N=4 N=3 N=2
4.0
3.0
3.0
2.0
N=1
1.0
N=2
1.0
0 0 20 40 60 INPUT VOLTAGE (V) 80 100
3512 F01
0 0 20 40 60 INPUT VOLTAGE (V) 80 100
3512 F03
Figure 1. Output Power for 3.3V Output
5.0 N = NPS(MAX) N=8 N=7 N=6 N=5 N=4 N=3 2.0 N=2 N=1
Figure 3. Output Power for 12V Output
5.0 N = NPS(MAX) 4.0 OUTPUT POWER (W) N=2
4.0 OUTPUT POWER (W)
3.0
3.0
N=1
2.0
1.0
1.0
0 0 20 40 60 INPUT VOLTAGE (V) 80 100
3512 F02
0 0 20 40 60 INPUT VOLTAGE (V) 80 100
3512 F04
Figure 2. Output Power for 5V Output
Figure 4. Output Power for 24V Output
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LT3512 APPLICATIONS INFORMATION
Table 1. Predesigned Transformers
TRANSFORMER PART NUMBER 750311559 LPRI (H) 175 LEAKAGE (H) 1.5 NP:NS:NB 4:1:1 ISOLATION (V) 1500 SATURATION CURRENT (mA) 800 VENDOR Wurth Elektronik TARGET APPLICATIONS 48V to 5V, 0.5A 24V to 5V, 0.38A 12V to 5V, 0.2A 48V to 3.3V, 0.59A 24V to 3.3V, 0.48A 12V to 3.3V, 0.29A 24V to 5V, 0.45A 12V to 5V, 0.23A 48V to 3.3V, 0.7A 24V to 3.3V, 0.59A 12V to 3.3V, 0.33A 48V to 24V, 0.11A 48V to 15V, 0.2A 48V to 12V, 0.22A 24V to 15V, 0.15A 12V to 15V, 0.075A 48V to 15V, 0.1A 48V to 12V, 0.11A 24V to 15V, 0.075A 12V to 70V, 0.007A 12V to 100V, 0.005A 12V to 150V, 0.004A 12V to +120V& -12V, 0.005A 12V 70V, 0.007A 48V to 5V, 0.5A 24V to 5V, 0.38A 12V to 5V, 0.2A 48V to 3.3V, 0.59A 24V to 3.3V, 0.48A 12V to 3.3V, 0.29A 24V to 5V, 0.45A 12V to 5V, 0.23A 48V to 3.3V, 0.7A 24V to 3.3V, 0.59A 12V to 3.3V, 0.33A 48V to 24V, 0.11A 48V to 15V, 0.2A 48V to 12V, 0.22A 24V to 15V, 0.15A 12V to 15V, 0.075A 48V to 15V, 0.1A 48V to 12V, 0.11A 24V to 15V, 0.075A 12V to 70V, 0.007A 12V to 100V, 0.005A 12V to 150V, 0.004A
750311573
200
2
6:1:2
1500
800
Wurth Elektronik
750311662 750311661
151 150
2 1.85
1:1:0.2 2:1:0.66
1500 1500
800 1.1A
Wurth Elektronik Wurth Elektronik
750311839
200
3
2:1:1
1500
800
Wurth Elektronik Wurth Elektronik Wurth Elektronik Wurth Elektronik Sumida
750311964
100
0.7
1:5:5
1500
900
750311966 750311692 10396-T025
120 80 200
0.45 2 2.0
1:5:0.5 1:5:5 4:1:1.2
1500 1500 1500
900 1.0A 800
10396-T027
200
2.0
6:1:2
1500
800
Sumida
01355-T058 10396-T023
125 200
2.0 2.0
1:1:0.2 2:1:0.33
1500 1500
800 800
Sumida Sumida
10396-T029
200
2.5
2:1:1
1500
800
Sumida
01355-T061
100
2
1:5:5
1500
800
Sumida
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LT3512 APPLICATIONS INFORMATION
TRANSFORMER DESIGN CONSIDERATIONS Successful application of the LT3512 relies on proper transformer specification and design. Carefully consider the following information in addition to the traditional guidelines associated with high frequency isolated power supply transformer design. Linear Technology has worked with several leading magnetic component manufacturers to produce pre-designed flyback transformers for use with the LT3512. Table 1 shows the details of these transformers. Turns Ratio Note that when using an RFB/RREF resistor ratio to set output voltage, the user has relative freedom in selecting a transformer turns ratio to suit a given application. In contrast, the use of simple ratios of small integers, e.g., 1:1, 2:1, 3:2, provides more freedom in setting total turns and mutual inductance. Typically, choose the transformer turns to maximize available output power. For low output voltages (3.3V or 5V), a N:1 turns ratio can be used with multiple primary windings relative to the secondary to maximize the transformer's current gain (and output power). However, remember that the SW pin sees a voltage that is equal to the maximum input supply voltage plus the output voltage multiplied by the turns ratio. In addition, leakage inductance will cause a voltage spike (VLEAKAGE) on top of this reflected voltage. This total quantity needs to remain below the absolute maximum rating of the SW pin to prevent breakdown of the internal power switch. Together these conditions place an upper limit on the turns ratio, N, for a given application. Choose a turns ratio low enough to ensure: N< 150V - VIN(MAX) - VLEAKAGE VOUT + VF For lower output power levels, choose a 1:1 or 1:N transformer for the absolute smallest transformer size. A 1:N transformer will minimize the magnetizing inductance (and minimize size), but will also limit the available output power. A higher 1:N turns ratio makes it possible to have very high output voltages without exceeding the breakdown voltage of the internal power switch. The turns ratio is an important element in the isolated feedback scheme. Make sure the transformer manufacturer guarantees turns ratio accuracy within 1%. Saturation Current The current in the transformer windings should not exceed its rated saturation current. Energy injected once the core is saturated will not be transferred to the secondary and will instead be dissipated in the core. Information on saturation current should be provided by the transformer manufacturers. Table 1 lists the saturation current of the transformers designed for use with the LT3512. Primary Inductance Requirements The LT3512 obtains output voltage information from the reflected output voltage on the switch pin. The conduction of secondary winding current reflects the output voltage on the primary. The sampling circuitry needs a minimum of 400ns to settle and sample the reflected output voltage. In order to ensure proper sampling, the secondary winding needs to conduct current for a minimum of 400ns. The following equation gives the minimum value for primaryside magnetizing inductance: LPRI tOFF(MIN) *NPS * ( VOUT + VF ) IPEAK(MIN)
tOFF(MIN) = 400ns IPEAK(MIN) = 100mA Leakage Inductance and Clamp Circuits Transformer leakage inductance (on either the primary or secondary) causes a voltage spike to appear at the primary after the output switch turns off. This spike is increasingly prominent at higher load currents where more stored energy must be dissipated. When designing an application,
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For larger N:1 values, a transformer with a larger physical size is needed to deliver additional current and provide a large enough inductance value to ensure that the off-time is long enough to accurately measure the output voltage. For larger N:1 values, choose a transformer with a larger physical size to deliver additional current. In addition, choose a large enough inductance value to ensure that the off-time is long enough to measure the output voltage.
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LT3512 APPLICATIONS INFORMATION
adequate margin should be kept for the effect of leakage voltage spikes. In most cases the reflected output voltage on the primary plus VIN should be kept below 100V. This leaves at least 50V of margin for the leakage spike across line and load conditions. A larger voltage margin will be needed for poorly wound transformers or for excessive leakage inductance. Figure 5 illustrates this point. Minimize transformer leakage inductance. A clamp circuit is recommended for most applications. Two circuits that can protect the internal power switch include the RCD (resistor-capacitor-diode) clamp and the DZ (diode-Zener) clamp. The clamp circuits dissipate the stored energy in the leakage inductance. The DZ clamp is the recommended clamp for the LT3512. Simplicity of design, high clamp voltages, and low power levels make the DZ clamp the preferred solution. Additionally, a DZ clamp ensures well defined and consistent clamping voltages. Figure 5 shows the clamp effect on the switch waveform and Figure 6 shows the connection of the DZ clamp.
VSW <150V VLEAKAGE <100V
LS Z D
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Figure 6. DZ Clamp
Proper care must be taken when choosing both the diode and the Zener diode. Schottky diodes are typically the best choice, but some PN diodes can be used if they turn on fast enough to limit the leakage inductance spike. Choose a diode that has a reverse-voltage rating higher than the maximum input voltage. The Zener diode breakdown voltage should be chosen to balance power loss and switch voltage protection. The best compromise is to choose the largest voltage breakdown. Use the following equation to make the proper choice: VZENER(MAX) 150V - VIN(MAX) For an application with a maximum input voltage of 72V, choose a 68V VZENER which has VZENER(MAX) at 72V, which will be below the 78V maximum. The power loss in the clamp will determine the power rating of the Zener diode. Power loss in the clamp is highest at maximum load and minimum input voltage. The switch current is highest at this point along with the energy stored in the leakage inductance. A 0.5W Zener will satisfy most applications when the highest VZENER is chosen. Choosing a low value for VZENER will cause excessive power loss as shown in the following equations:
1 DZ Power Loss = *L *IPK(VIN(MIN))2 * fSW * 2 NPS * ( VOUT + VF ) 1+ V ZENER - NPS * ( VOUT + VF ) L = Leakage Inductance
t OFF > 400ns tSP < 150ns TIME
without Clamp
VSW <150V <140V <100V
t OFF > 400ns tSP < 150ns
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IPK(VIN(MIN)) =
TIME
VOUT *IOUT * 2 * VIN(MIN) *DVIN(MIN)
with Clamp
fSW =
Figure 5. Maximum Voltages for SW Pin Flyback Waveform
1 1 = LPRI *IPK(VIN(MIN)) LPRI *IPK(VIN(MIN)) tON + tOFF + VIN(MIN) NPS * ( VOUT + VF )
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LT3512 APPLICATIONS INFORMATION
Table 2 and 3 show some recommended diodes and Zener diodes.
Table 2. Recommended Zener Diodes
PART MMSZ5266BT1G MMSZ5270BT1G CMHZ5266B CMHZ5267B BZX84J-68 BZX100A VZENER (V) 68 91 68 75 68 100 POWER (W) 0.5 0.5 0.5 0.5 0.5 0.5 CASE SOD-123 SOD-123 Central SOD-123 Semiconductor SOD323F NXP SOD323F VENDOR
SOD-123 On Semi
pulse. The smaller flyback pulse results in a higher regulated output voltage. The inductive divider effect of secondary leakage inductance is load independent. RFB/RREF ratio adjustments can accommodate this effect to the extent secondary leakage inductance is a constant percentage of mutual inductance (over manufacturing variations). Winding Resistance Effects Resistance in either the primary or secondary will reduce overall efficiency (POUT/PIN). Good output voltage regulation will be maintained independent of winding resistance due to the boundary mode operation of the LT3512. Bifilar Winding
Table 3. Recommended Diodes
PART DFLS1100 DFLS1150 I (A) 1.0 1.0 VREVERSE (V) 100 150 VENDOR Diodes Inc.
Leakage Inductance Blanking When the power switch turns off, the flyback pulse appears. However, a finite time passes before the transformer primary-side voltage waveform approximately represents the output voltage. Rise time on the SW node and transformer leakage inductance cause the delay. The leakage inductance also causes a very fast voltage spike on the primary side of the transformer. The amplitude of the leakage spike is largest when power switch current is highest. Introduction of an internal fixed delay between switch turn-off and the start of sampling provides immunity to the phenomena discussed above. The LT3512 sets internal blanking to 150ns. In certain cases leakage inductance spikes last longer than the internal blanking, but will not significantly affect output regulation. Secondary Leakage Inductance In addition to primary leakage inductance, secondary leakage inductance exhibits an important effect on application design. Secondary leakage inductance forms an inductive divider on the transformer secondary. The inductive divider effectively reduces the size of the primary-referred flyback
A bifilar, or similar winding technique, is a good way to minimize troublesome leakage inductances. However, remember that this will also increase primary-to-secondary capacitance and limit the primary-to-secondary breakdown voltage, so bifilar winding is not always practical. The Linear Technology applications group is available and extremely qualified to assist in the selection and/or design of the transformer. APPLICATION DESIGN CONSIDERATIONS Iterative Design Process The LT3512 uses a unique sampling scheme to regulate the isolated output voltage. The use of this isolated scheme requires a simple iterative process to choose feedback resistors and temperature compensation. Feedback resistor values and temperature compensation resistance is heavily dependent on the application, transformer and output diode chosen. Once resistor values are fixed after iteration, the values will produce consistent output voltages with the chosen transformer and output diode. Remember, the turns ratio of the transformer must be guaranteed within 1%. The transformer vendors mentioned in this data sheet can build transformers to this specification.
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LT3512 APPLICATIONS INFORMATION
Selecting RFB and RREF Resistor Values The following section provides an equation for setting RFB and RREF values. The equation should only serve as a guide. Follow the procedure outlined in the Design Procedure to set accurate values for RFB, RREF and RTC using the iterative design procedure. Rearrangement of the expression for VOUT in the Temperature Compensation section, developed in the Operations section, yields the following expression for RFB : RFB = where: VOUT = Output voltage VF = Switching diode forward voltage NPS = Effective primary-to-secondary turns ratio VTC = 0.55V This equation assumes: R TC = RFB NPS RREF * NPS ( VOUT + VF ) + VTC VBG
EN/UVLO RUN/STOP CONTROL (OPTIONAL) VIN R1
LT3512
R2
GND
3512 F07
Figure 7. Undervoltage Lockout (UVLO)
In addition, the EN/UVLO pin draws 2.6A when the voltage at the pin is below 1.21V. This current provides user programmable hysteresis based on the value of R1. The effective UVLO thresholds are: VIN(UVLO,RISING) = 1.2V * (R1+ R2) + 2.6A * R1 R2 1.2V * (R1+ R2) VIN(UVLO,FALLING) = R2
The equation assumes the temperature coefficients of the diode and VTC are equal, which is a good first order approximation. Strictly speaking, the above equation defines RFB not as an absolute value, but as a ratio of RREF . So the next question is, what is the proper value for RREF? The answer is that RREF should be approximately 10k. The LT3512 is trimmed and specified using this value of RREF . If the impedance of RREF varies considerably from 10k, additional errors will result. However, a variation in RREF of several percent is acceptable. This yields a bit of freedom in selecting standard 1% resistor values to yield nominal RFB/RREF ratios. Undervoltage Lockout (UVLO) A resistive divider from VIN to the EN/UVLO pin implements undervoltage lockout (UVLO). Figure 7 shows this configuration. The EN/UVLO pin threshold is set at 1.21V.
Figure 7 also shows the implementation of external shutdown control while still using the UVLO function. The NMOS grounds the EN/UVLO pin when turned on, and puts the LT3512 in shutdown with quiescent current draw of less than 1A. Minimum Load Requirement The LT3512 recovers output voltage information using the flyback pulse. The flyback pulse occurs once the switch turns off and the secondary winding conducts current. In order to regulate the output voltage, the LT3512 needs to sample the flyback pulse. The LT3512 delivers a minimum amount of energy even during light load conditions to ensure accurate output voltage information. The minimum delivery of energy creates a minimum load requirement of 20mA to 25mA depending on the specific application. Verify minimum load requirements for each application. A Zener diode with a Zener breakdown of 20% higher than the output voltage can serve as a minimum load if pre-loading is not acceptable. For a 5V output, use a 6V Zener with cathode connected to the output.
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LT3512 APPLICATIONS INFORMATION
BIAS Pin Considerations The BIAS pin powers the internal circuitry of the LT3512. Three unique configurations exist for regulation of the BIAS pin. In the first configuration, the internal LDO drives the BIAS pin internally from the VIN supply. In the second setup, the VIN supply directly drives the BIAS pin through a direct connection bypassing the internal LDO. This configuration will allow the part to operate down to 4.5V and up to 15V. In the third configuration, an external supply or third winding drives the BIAS pin. Use this option when a voltage supply exists lower than the input supply. Drive the BIAS pin with a voltage supply higher than 3.3V to disable the internal LDO. The lower voltage supply provides a more efficient source of power for internal circuitry.
LT3512 VIN 6V TO 100V
improves overall system efficiency. Design the third winding to output a voltage between 3.3V and 12V. For a typical 48VIN application, overdriving the BIAS pin improves efficiency 4% to 5%. Loop Compensation An external resistor-capacitor network compensates the LT3512 on the VC pin. Typical compensation values are in the range of RC = 15k and CC = 4.7nF (see the numerous schematics in the Typical Applications section for other possible values). Proper choice of both RC and CC is important to achieve stability and acceptable transient response. For example, vulnerability to high frequency noise and jitter result when RC is too large. On the other hand, if RC is too small, transient performance suffers. The inverse is true with respect to the value of CC. Transient response suffers with too large of a CC, and instability results from too small a CC. The specific value for RC and CC will vary based on the application and transformer choice. Verify specific choices with board level evaluation and transient response performance. DESIGN PROCEDURE/DESIGN EXAMPLE Use the following design procedure as a guide to designing applications for the LT3512. Remember, the unique sampling architecture requires an iterative process for choosing correct resistor values.
LDO 3V BIAS
LT3512
VIN
4.5V TO 15V
LDO
BIAS OPTIONAL
The design example involves designing a 15V output with a 200mA load current and an input range from 36V to 72V. VIN(MIN) = 36V, VIN(NOM) = 48V, VIN(MAX) = 72V, VOUT = 15V and IOUT = 200mA
LT3512
VIN
6V TO 100V
LDO 3.3V < BIAS < 20V BIAS
3512 F08
EXTERNAL SUPPLY
Step 1: Select the transformer turns ratio. NPS < VSW(MAX) - VIN(MAX) - VLEAKAGE VOUT + VF
Figure 8. BIAS Pin Configurations
Overdriving the BIAS Pin with a Third Winding The LT3512 provides excellent output voltage regulation without the need for an opto-coupler, or third winding, but for some applications with higher input voltages (>20V), an additional winding (often called a third winding)
VSW(MAX) = Max rating of internal switch = 150V VLEAKAGE = Margin for transformer leakage spike = 40V VF = Forward voltage of output diode = assume approximately ~ 0.5V Example:
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15
LT3512 APPLICATIONS INFORMATION
150V - 72V - 40V 15V + 0.5V NPS < 2.45 NPS < NPS = 2 The choice of turns ratio is critical in determining output power as shown earlier in the Output Power section. At this point, a third winding can be added to the transformer to drive the BIAS pin of the LT3512 for higher efficiencies. Choose a turns ratio that sets the third winding voltage to regulate between 3.3V and 6V for maximum efficiency. Choose a third winding ratio to drive BIAS winding with 5V. (Optional) Example: NTHIRD VTHIRD 5V = = = 0.33 NS VOUT 15V The turns ratio of the transformer chosen is as follows NPRIMARY: NSECONDARY: NTHIRD = 2:1:0.33. Step 2: Calculate maximum power output at minimum VIN. POUT(VIN(MIN)) = * VIN(MIN) * IIN = * VIN(MIN) * D * IPEAK * 0.5 D= Step 3: Determine primary inductance, switching frequency and saturation current. Primary inductance for the transformer must be set above a minimum value to satisfy the minimum off time requirement. LPRI tOFF(MIN) *NPS * ( VOUT + VF ) IPEAK(MIN)
tOFF(MIN) = 400ns IPEAK(MIN) = 100mA Example: 400ns * 2 * (15 + 0.5) 0.1 LPRI 124H LPRI In addition, primary inductance will determine switching frequency. fSW = 1 1 = LPRI *IPEAK tON + tOFF LPRI *IPEAK + VIN NPS * ( VOUT + VF ) VOUT *IOUT * 2 * VIN *D
IPEAK = Example:
( VOUT + VF ) *NPS ( VOUT + VF ) *NPS + VIN(MIN)
= Efficiency = ~83% IPEAK = Peak switch current = 0.44A Example: D = 0.46 POUT(VIN(MIN)) = 3W IOUT(VIN(MIN)) = POUT(VIN(MIN))/VOUT = 0.2A The chosen turns ratio satisfies the output current requirement of 200mA. If the output current was too low, the minimum input voltage could be adjusted higher. The turns ratio in this example is set to its highest ratio given switch voltage requirements and margin for leakage inductance voltage spike.
Let's calculate switching frequency at our nominal VIN of 48V. D=
(15 + 0.5) * 2 = 0.39 (15 + 0.5) * 2 + 48
15V * 0.2A * 2 = 0.39A 0.83 * 48V * 0.39
IPEAK =
Let's choose LPRI = 200H. Remember, most transformers specify primary inductance with a tolerance of 20%. fSW = 240kHz Finally, the transformer needs to be rated for the correct saturation current level across line and load conditions. In the given example, the worst-case condition for switch current is at minimum VIN and maximum load.
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16
LT3512 APPLICATIONS INFORMATION
VOUT *IOUT * 2 * VIN * D 15V * 0.2A * 2 IPEAK = = 0.44A 0.83 * 36V * 0.46 IPEAK = Ensure that the saturation current covers steady-state operation, start-up and transient conditions. To satisfy these conditions, choose a saturation current 50% or more higher than the steady-state calculation. In this example, a saturation current between 700mA and 800mA is chosen. Table 1 presents a list of pre-designed flyback transformers. For this application, the Sumida 10396-T023 transformer will be used. Step 4: Choose the correct output diode. The two main criteria for choosing the output diode include forward current rating and reverse voltage rating. The maximum load requirement is a good first-order guess at the average current requirement for the output diode. A better metric is RMS current. IRMS =IPEAK(VIN(MIN)) *NPS * Example: 1- 0.46 IRMS = 0.44 * 2 * = 0.37A 3 Next calculate reverse voltage requirement using maximum VIN: VREVERSE = VOUT + Example: VREVERSE = 15V + 72V = 51V 2 VIN(MAX) NPS 1- DVIN(MIN) 3 Step 5: Choose an output capacitor. The output capacitor choice should minimize output voltage ripple and balance the trade-off between size and cost for a larger capacitor. Use the equation below at nominal VIN: C= IOUT *D VOUT * fSW
Example: Design for ripple levels below 50mV. C= 0.2A * 0.39 = 6.5F 0.05V * 240kHz
A 22F 25V output capacitor is chosen. Remember ce, ramic capacitors lose capacitance with applied voltage. The capacitance can drop to 40% of quoted capacitance at the max voltage rating. Step 6: Design clamp circuit. The clamp circuit protects the switch from leakage inductance spike. A DZ clamp is the preferred clamp circuit. The Zener and the diode need to be chosen. The maximum Zener value is set according to the maximum VIN: VZENER(MAX) 150V - VIN(MAX) Example: VZENER(MAX) 150V - 72V VZENER(MAX) 78V In addition, power loss in the clamp circuit is inversely related to the clamp voltage as shown previously. Higher clamp voltages lead to lower power loss. A 68V Zener with a maximum of 72V will provide optimal protection and minimize power loss. Half-watt Zeners will satisfy most clamp applications involving the LT3512. Power loss can be calculated using the equations presented in the Leakage Inductance and Clamp Circuit section. The Zener chosen is a 68V 0.5W Zener from On Semiconductor (MMSZ5266BT1G).
A 1.0A, 60V diode from Diodes Inc. (DFLS160) will be used.
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17
LT3512 APPLICATIONS INFORMATION
Choose a diode that is fast and has sufficient reverse voltage breakdown: VREVERSE > VIN(MAX) Example: VREVERSE > 72V The diode needs to handle the peak switch current of the switch which was determined to be 0.45A. A 100V, 1.0A diode from Diodes Inc. (DFLS1100) is chosen. Step 7: Compensation. Compensation will be optimized towards the end of the design procedure. Connect a resistor and capacitor from the VC node to ground. Use a 15k resistor and a 4.7nF capacitor. Step 8: Select RFB and RTC Resistors. Use the following equations to choose starting values for RFB and RTC. Set RREF to 10k. RFB = Step 9: Adjust RFB based on output voltage. Power up the application with application components connected and measure the regulated output voltage. Readjust RFB based on the measured output voltage. RFB(NEW) = Example:
RFB(NEW) = 15V * 267k = 237k 16.7V
VOUT VOUT(MEAS)
*RFB(OLD)
Step 10: Remove RTC and measure output voltage over temperature. Measure output voltage in a controlled temperature environment like an oven to determine the output temperature coefficient. Measure output voltage at a consistent load current and input voltage, across the temperature range of operation. This procedure will optimize line and load regulation over temperature. Calculate the temperature coefficient of VOUT : VOUT VOUT(HOT) - VOUT(COLD) = Temp THOT(C) - TCOLD(C) Example: VOUT measured at 200mA and 48VIN VOUT 15.42V - 15.02V = = 2.26mV C Temp 125C - ( -50C)
( VOUT + VF + 0.55V ) *NPS *RREF
1.2V RFB NPS
RREF = 10k R TC = Example: RFB = R TC =
(15 + 0.5 + 0.55V ) * 2 * 10k = 267k
1.2V 267k = 133k 2
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18
LT3512 APPLICATIONS INFORMATION
Step 11: Calculate new value for RTC. R TC(NEW) = RFB 1.85mV C * VOUT NPS Temp Step 15: Ensure minimum load. Check minimum load requirement at maximum input voltage. The minimum load occurs at the point where the output voltage begins to climb up as the converter delivers more energy than what is consumed at the output. Example: 237k 1.85 * = 97.6k 2 2.26 The minimum load at an input voltage of 72V is: 11mA Step 16: EN/UVLO resistor values. Determine amount of hysterysis required. Voltage hysteresis = 2.6A * R1 Example: Choose 2V of hysteresis. 15V * 237k = 243k 14.7V R1= 2V = 768k 2.6A
Example: R TC(NEW) =
Step 12: Place new value for RTC, measure VOUT , and readjust RFB due to RTC change. RFB(NEW) = Example: RFB(NEW) = VOUT VOUT(MEAS) *RFB(OLD)
Step 13: Verify new values of RFB and RTC over temperature. Measure output voltage over temperature with RTC connected. Step 14: Optimize compensation. Now that values for RFB and RTC are fixed, optimize the compensation. Compensation should be optimized for transient response to load steps on the output. Check transient response across the load range. Example: The optimal compensation for the application is: RC = 18.7k, CC = 4.7nF
Determine UVLO Threshold. 1.2V * (R1+R2) R2 1.2V *R1 R2 = VIN(UVLO,FALLING) - 1.2V VIN(UVLO,FALLING) = Set UVLO falling threshold to 30V. R2 = 1.2V * 768k = 32.4k 30V - 1.2V 1.2V * (R1+R2) VIN(UVLO,FALLING) = R2 1.2V * ( 768k + 32.4k ) = = 30V 32.4k
VIN(UVLO,RISING) = VIN(UVLO,FALLING) + 2.6A * R1 = 30V + 2.6A * 768k = 32V
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19
LT3512 TYPICAL APPLICATIONS
48V to 5V Isolated Flyback Converter
VIN 36V TO 72V 4:1:1 C1 1F R1 1M EN/UVLO R2 43.2k LT3512 RFB RREF R3 169k R4 10k D3 VIN Z1 D1 VOUT+ 5V 0.5A C4 47F VOUT- C1: TAIYO YUDEN HMK316B7105KL-T C3: TAIYO YUDEN EMK212B7475KG C4: TAIYO YUDEN LMK325B7476MM-TR D1: DIODES INC. SBR2A40P1 D2: CENTRAL SEMI CMDSH-3 D3: DIODES INC. DFLS1100 T1: WURTH 750311559 Z1: ON SEMI MMSZ5266BT1G
T1 175H
11H
TC VC R5 57.6k GND R6 12.7k C2 4.7nF
SW BIAS D2 L1C 11H
3512 TA02
C3 4.7F
OPTIONAL THIRD WINDING FOR HV OPERATION
48V to 15V Isolated Flyback Converter
VIN 36V TO 72V C1 1F 2:1 R1 1M EN/UVLO R2 43.2k LT3512 RFB RREF R3 243k R4 10k D2 VIN Z1 T1 200H 50H D1 VOUT+ 15V 0.2A C4 22F VOUT- C1: TAIYO YUDEN HMK316B7105KL-T C3: TAIYO YUDEN EMK212B7475KG C4: MURATA GRM32ER71E226KE15B D1: DIODES INC. DFLS160 D2: DIODES INC. DFLS1100 T1: SUMIDA 10396-T023 Z1: ON SEMI MMSZ5266BT1G
TC VC R5 97.6k GND R6 18.7k C2 4.7nF
3512 TA03
SW BIAS
C3 4.7F
48V to 24V Isolated Flyback Converter
VIN 36V TO 72V C1 1F 1:1 R1 1M EN/UVLO R2 43.2k LT3512 RFB RREF R3 187k R4 10k D2 VIN Z1 T1 151H D1 VOUT+ 24V 110mA C4 10F VOUT- C1: TAIYO YUDEN HMK316B7105KL-T C3: TAIYO YUDEN EMK212B7475KG C4: TAIYO YUDEN UMK316AB7475KL-T D1: DIODES INC. SBR1U150SA D2: DIODES INC. DFLS1100 T1: WURTH 750311662 Z1: ON SEMI MMSZ5266BT1G
151H
TC VC R5 162k GND R6 24.3k C2 2.2nF
3512 TA04
SW BIAS
C3 4.7F
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20
LT3512 TYPICAL APPLICATIONS
24V to 5V Isolated Flyback Converter
VIN 20V TO 30V 6:1 C1 4.7F R1 1M EN/UVLO R2 80.6k LT3512 RFB RREF R3 249k R4 10k D2 VIN Z1 T1 200H 5.5H D1 VOUT+ 5V 0.45A C4 47F VOUT- C1: TAIYO YUDEN UMK316AB7475KL-T C3: TAIYO YUDEN EMK212B7475KG C4: TAIYO YUDEN LMK32587476MM-TR D1: DIODES INC. SBR2A30P1 D2: DIODES INC. DFLS1100 T1: SUMIDA 10396-T027 Z1: ON SEMI MMSZ5270BT1G
TC VC R5 69.8k GND R6 6.49k C2 4.7nF
3512 TA05
SW BIAS
C3 4.7F
24V to 15V Isolated Flyback Converter
VIN 20V TO 30V 2:1 C1 4.7F R1 1M EN/UVLO R2 80.6k LT3512 RFB RREF R3 237k R4 10k D2 VIN Z1 T1 200H D1 VOUT+ 15V 0.15A C4 22F VOUT- C1: TAIYO YUDEN UMK316AB7475KL-T C3: TAIYO YUDEN EMK212B7475KG C4: MURATA GRM32ER71E226KE158 D1: DIODES INC. SBR140S3 D2: DIODES INC. DFLS1100 T1: SUMIDA 10396-T023 Z1: ON SEMI MMSZ5270BT1G
50H
TC VC R5 150k GND R6 20k C2 4.7nF
3512 TA06
SW BIAS
C3 4.7F
12V to 15V Isolated Flyback Converter
VIN 8V TO 20V 2:1 C1 4.7F R1 1M EN/UVLO R2 562k LT3512 RFB RREF R3 237k R4 10k D2 VIN Z1 T1 150H D1 VOUT+ 15V 70mA C4 10F Z2 VOUT- OPTIONAL MINIMUM LOAD C1: TAIYO YUDEN UMK316AB7475KL-T C3: TAIYO YUDEN EMK212B7475KG C4: MURATA GRM32ER7IE226K D1: DIODES INC. SBR2A40P1 D2: DIODES INC. DFLS1100 T1: WURTH 750311661 Z1: ON SEMI MMSZ5270BT1G
38H
TC VC R5 107k GND R6 21.5k C2 6.8nF
3512 TA08
SW BIAS
C3 4.7F
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21
LT3512 TYPICAL APPLICATIONS
12V to 70V Isolated Flyback Converter
C6 R7 10pF 3k VIN 10V TO 20V 1:5:5 C1 2.2F R1 1M EN/UVLO R2 562k R3 100k LT3512 RFB RREF D2 R4 10k VOUT2+ 7mA D3 C7 R8 10pF 3k VIN Z1 T1 100H D1 VOUT1+ 70V 7mA C4 0.47F VOUT1-
TC VC R5 1M GND R6 24.9k C2 6.8nF
3512 TA07
SW BIAS
C3 4.7F
C5 0.47F VOUT2- -70V C1: TAIYO YUDEN UMK316AB7475KL-T C3: TAIYO YUDEN EMK212B7475KG C4, C5: NIPPON CHEMI-CON KTS251B474M43N0T00 D1, D2: DIODES INC. ES1G D3: DIODES INC. DFLS1100 T1: WURTH 750311692 Z1: ON SEMI MMS2527OBT1G
48V to 3.3V Non-Isolated Flyback Converter
VIN 36V TO 72V 6:1 C1 1F R1 1M EN/UVLO R2 43.2k LT3512 RREF VIN RFB R3 1M 8.66k VOUT R4 5k C1: TAIYO YUDEN HMK316B7105KL-T C3: TAIYO YUDEN EMK212B7475KG C4: TAIYO YUDEN LMK325B7476MM-TR x2 D1: DIODES INC. SBR3U30P1 D2: DIODES INC. DFLS1100 T1: WURTH 750311573 Z1: ON SEMI MMSZ5266BT1G Z1 D2 T1 200H D1 VOUT+ 3.3V 0.7A
5.5H
C4 47F x2 VOUT-
TC VC R5 1M GND R6 9.53k C2 4.7nF
SW BIAS
C3 4.7F
3512 TA09
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22
LT3512 TYPICAL APPLICATIONS
48V to 12V Isolated Flyback Converter
VIN 36V TO 72V C1 1F 2:1 R1 1M EN/UVLO R2 43.2k LT3512 RFB RREF R3 191k R4 10k D2 VIN Z1 T1 200H 50H D1 VOUT+ 12V 0.2A C4 10F VOUT- C1: TAIYO YUDEN HMK316B7105KL-T C3: TAIYO YUDEN EMK212B7475KG C4: TAIYO YUDEN TMK316AB7106KL-T D1: DIODES INC. DFLS160 D2: DIODES INC. DFLS1100 T1: SUMIDA 10396-T023 Z1: ON SEMI MMSZ5266BT1G
TC VC R5 75k GND R6 5.23k C2 4.7nF
SW BIAS
C3 4.7F
3512 TA10
PACKAGE DESCRIPTION
MS Package Varitation: MS16 (12) 16-Lead Plastic MSOP with 4 Pins Removed
(Reference LTC DWG # 05-08-1847 Rev A)
1.0 (.0394) BSC
0.889 (.035
0.127 .005)
5.23 (.206) MIN
3.20 - 3.45 (.126 - .136)
4.039 0.102 (.159 .004) (NOTE 3) 16 14 121110 9
0.305 0.038 (.0120 .0015) TYP
0.50 (.0197) BSC
4.90 0.152 (.193 .006)
0.280 0.076 (.011 .003) REF
RECOMMENDED SOLDER PAD LAYOUT
DETAIL "A" 0 - 6 TYP
3.00 0.102 (.118 .004) (NOTE 4)
0.254 (.010) GAUGE PLANE
1
0.53 0.152 (.021 .006) DETAIL "A" 0.18 (.007) SEATING PLANE
1.10 (.043) MAX
3 5678 1.0 (.0394) BSC
0.86 (.034) REF
MSOP (MS12) 0510 REV A NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
0.17 -0.27 (.007 - .011) TYP
0.50 (.0197) BSC
0.1016 (.004
0.0508 .002)
3512f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
23
LT3512 TYPICAL APPLICATION
48V to 15V Isolated Flyback Converter
VIN 36V TO 72V 2:1:1 C1 1F R1 1M EN/UVLO R2 43.2k LT3512 RFB RREF R4 10k R3 237k D3 D2 VIN Z1 T1 200H D1 VOUT1+ 15V 100mA C4 10F VOUT1- VOUT2+ 100mA C5 10F VOUT2- -15V
50H
50H
TC VC R5 287k GND R6 8.66k C2 6.8nF
SW BIAS
C3 4.7F
3512 TA11
C1: TAIYO YUDEN HMK316B7105KL-T C3: TAIYO YUDEN EMK212B7475KG C4, C5: TAIYO YUDEN TMK316AB7106KL-T D1, D2: DIODES INC. SBR0560S1 D3: DIODES INC. DFLS1100 T1: WURTH 750311839 Z1: ON SEMI MMSZ5266BT16
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PART NUMBER LT3511 LT3748 LT3958 LT3957 LT3956 LT3575 LT3573 LT3574 LT3757 LT3758 DESCRIPTION Monolithic High Voltage Isolated Flyback Converter 100V Isolated Flyback Controller High Input Voltage Boost, Flyback, SEPIC and Inverting Converter Boost, Flyback, SEPIC and Inverting Converter Constant-Current, Constant-Voltage Boost, Buck, Buck-Boost, SEPIC or Flyback Converter Isolated Flyback Switching Regulator with 60V/2.5A Integrated Switch Isolated Flyback Switching Regulator with 60V/1.25A Integrated Switch Isolated Flyback Switching Regulator with 60V/0.65A Integrated Switch Boost, Flyback, SEPIC and Inverting Controller Boost, Flyback, SEPIC and Inverting Controller COMMENTS 4.5V VIN 100V, 240mA/150V Onboard Power Switch, MSOP-16 with High Voltage Spacing 5V VIN 100V, No Opto-Isolator or "Third Winding" Required, Onboard Gate Driver, MSOP-16 with High Voltage Pin Spacing 5V VIN 80V, 3.3A/84V Onboard Power Switch, 5mm x 6mm QFN-36 with High Voltage Pin Spacing 3V VIN 40V, 5A/40V Onboard Power Switch, 5mm x 6mm QFN-36 with High Voltage Pin Spacing 4.5V VIN 80V, 3.3A/84V Onboard Power Switch, True PWM Dimming, 5mm x 6mm QFN-36 with High Voltage Pin Spacing 3V VIN 40V, No Opto-Isolator or "Third Winding" Required, Up to 14W, TSSOP-16E 3V VIN 40V, No Opto-Isolator or "Third Winding" Required, Up to 7W, MSOP-16E 3V VIN 40V, No Opto-Isolator or "Third Winding" Required, Up to 3W, MSOP-16 2.9V VIN 40V, 100kHz to 1MHz Programmable Operating Frequency, 3mm x 3mm DFN-10 and MSOP-10E Package 5.5V VIN 100V, 100kHz to 1MHz Programmable Operating Frequency, 3mm x 3mm DFN-10 and MSOP-10E Package 2.5V VIN 36V, Burst Mode(R) Operation at Light Loads, MSOP-10
LTC1871/LTC1871-1/ No RSENSETM Low Quiescent Current Flyback, Boost LTC1871-7 and SEPIC Controller
3512f
24 Linear Technology Corporation
(408) 432-1900 FAX: (408) 434-0507
LT 0211 * PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
www.linear.com
(c) LINEAR TECHNOLOGY CORPORATION 2011

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